L'arbre d’horloge d'un circuit synchrone représente généralement une part non négligeable de sa consommation dynamique. Le clock gating consiste donc à couper le signal d'horloge d'une partie du circuit lorsque celle-ci est inactive.
La taille (granularité) de la zone coupée est très variable. On peut choisir de stopper l'horloge d'un des CPU d'un multiprocesseur comme de couper l'horloge d'une dizaine de bascule dans ce même CPU. Pour obtenir la meilleure réduction de consommation possible sans réduire les performances, on imbrique généralement plusieurs niveaux de clock gating.
Cette technique n'a aucune incidence sur la consommation statique du circuit. Pour réduire cette dernière, il faut réduire ou couper totalement l'alimentation d'un sous circuit. On parle dans ce cas de power gating.
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