Processor Local Bus
- Processor Local Bus
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Le Processor Local Bus (PLB) est un bus introduit[Quand ?] par IBM dans le cadre de l'architecture de bus CoreConnect, qui comprend également les bus OPB (On-chip Peripheral Bus) et DCR (Device Control Register).
Caractéristiques du bus PLB :
- Bus synchrone, non multiplexé
- Bus de lecture et d'écriture séparés
- Support de lecture/écriture concurrentes
- Multimaître à priorité programmable et disposant d'un arbitre
- Adresses sur 32 bits
- Implémentations sur 32, 64 et 128 bits de données
- Fréquences supportées : 66, 133 et 183 MHz (respectivement pour les versions 32, 64 et 128 bits)
- Pipeliné, support des interruptions de transfert
- Support des bursts de taille fixée et variable
- Support du verrou
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